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AM29BL162C データシート(PDF) 22 Page - Advanced Micro Devices

部品番号 AM29BL162C
部品情報  16 Megabit (1 M x 16-Bit) CMOS 3.0 Volt-only Burst Mode Flash Memory
PDF  52 Pages
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メーカー  AMD [Advanced Micro Devices]
ホームページ  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM29BL162C データシート(HTML) 22 Page - Advanced Micro Devices

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Am29BL162C
22142F9 January 22, 2007
D A TA
SH EET
Figure 3.
Burst Mode Read with 40 MHz CLK, 65 ns tIACC,18 ns tBACC Parameters
Figure 4.
Burst Mode Read with 25 MHz CLK, 70 ns tIACC,24 ns tBACC Parameters
Reset Command
Writing the reset command to the device resets the de-
vice to reading array data. Address bits are don’t care
for this command.
The reset command may be written between the se-
quence cycles in an erase command sequence before
erasing begins. This resets the device to reading array
data. Once erasure begins, however, the device ig-
nores reset commands until the operation is complete.
The reset command may be written between the se-
quence cycles in a program command sequence be-
fore programming begins. This resets the device to
reading array data (also applies to programming in
Erase Suspend mode). Once programming begins,
however, the device ignores reset commands until the
operation is complete.
The reset command may be written between the se-
quence cycles in an autoselect command sequence.
Once in the autoselect mode, the reset command must
be written to return to reading array data (also applies
to autoselect during Erase Suspend).
If DQ5 goes high during a program or erase operation,
writing the reset command returns the device to read-
ing array data (also applies during Erase Suspend).
See “AC Characteristics” for parameters, and to
Figure 17 for the timing diagram.
Autoselect Command Sequence
The autoselect command sequence allows the host
system to access the manufacturer and devices codes,
and determine whether or not a sector is protected.
Table 8 shows the address and data requirements.
CLK
LBA#
BAA#
Data
OE#
Step 1
Step 2
Step 3
25 ns
25 ns
25 ns
25 ns
65 ns
25 ns
18 ns
Da
Da +1
Da +2
18 ns
CLK
LBA#
BAA#
Data
Step 1
Step 2
Step 3
40 ns
40 ns
40 ns
40 ns
70 ns
40 ns
24 ns
Da
Da +1
24 ns
Da +2
Da +3
24 ns
OE#



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