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AM29PDS322DB40WMIN データシート(PDF) 25 Page - Advanced Micro Devices

部品番号 AM29PDS322DB40WMIN
部品情報  32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only (1.8 V to 2.2 V) Simultaneous Read/Write Page-Mode Boot Sector Flash Memory
PDF  51 Pages
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メーカー  AMD [Advanced Micro Devices]
ホームページ  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM29PDS322DB40WMIN データシート(HTML) 25 Page - Advanced Micro Devices

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December 4, 2006 23569A5
Am29PDS322D
23
D A TA
SH EET
cycles, followed by a set-up command. Two additional
unlock write cycles are then followed by the chip erase
command, which in turn invokes the Embedded Erase
algorithm. The device does not require the system to
preprogram prior to erase. The Embedded Erase algo-
rithm automatically preprograms and verifies the entire
memory for an all zero data pattern prior to electrical
erase. The system is not required to provide any con-
trols or timings during these operations. Table 10
shows the address and data requirements for the chip
erase command sequence.
Start
555h/AAh
2AAh/55h
XXXh/A0h
555h/20h
Verify Byte?
No
Program Address/Program Data
Data# Polling Device
Last Address
?
Programming Completed
(BA) XXXh/90h
XXXh/F0h
Increment
Address
No
Yes
Yes
Set
Unlock
Bypass
Mode
In
Unlock
Bypass
Program
Reset
Unlock
Bypass
Mode
Figure 4.
Unlock Bypass Algorithm
START
Write Program
Command Sequence
Data Poll
from System
Verify Data?
No
Yes
Last Address?
No
Yes
Programming
Completed
Increment Address
Embedded
Program
algorithm
in progress
Note: See Table 10 for program command sequence.
Figure 5.
Program Operation



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