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L6701 データシート(PDF) 40 Page - STMicroelectronics

部品番号 L6701
部品情報  3 Phase Controller for VR10, VR9 and K8 CPUs
PDF  44 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L6701 データシート(HTML) 40 Page - STMicroelectronics

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16 Layout Guidelines
L6701
40/44
16.3
Embedding L6701-based VRs
When embedding the VR into the application, additional care must be taken since the whole VR
is a switching DC/DC regulator and the most common systems in which it has to work are
digital systems such as MB or similar. In fact, latest MB has become faster and powerful: high
speed data bus are more and more common and switching-induced noise produced by the VR’
MOSFETs can affect data integrity if not following additional layout guidelines. Few easy points
must be considered mainly when routing traces and planes in which high switching currents
flow (high switching currents cause voltage spikes across the stray inductance of the trace
causing noise that can affect the near traces):
Keep safe guarding distance between high current switching VRD traces and data buses,
especially if high-speed data bus to minimize noise coupling.
Keep safe guard distance or filter properly when routing bias traces for I/O sub-systems that
must walk near the VRD.
Possible causes of noise can be located in the PHASE connections, MOSFET gate drive and
Input voltage path (from input bulk capacitors and HS drain). Also PGND connections must be
considered if not insisting on a power ground plane. These connections must be carefully kept
far away from noise-sensitive data bus.
Since the generated noise is mainly due to the switching activity of the VR, noise emissions
depend on how fast the current switches. To reduce noise emission levels, it is also possible, in
addition to the previous guidelines, to reduce the current slope by properly tuning the HS gate
resistor and the PHASE snubber network.



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