IRCC2.0 datasheet(39/87 Pages) SMSC

39 / 87 page

Identifier Registers.

These read-only registers

classify the hardware Manufacturer, the Device

ID, the Version number, and Host interface

parameters. Bits and registers marked “reserved”

in the table below cannot be written and return 0x

when read. Programmers must set reserved bits

to 0 when writing to registers that contain

reserved bits.

Table 27 - Register Block Three

Address

Direction

Description

Default

SMSC ID (high-byte)

'10'hex

SMSC ID (low-byte)

'B8'hex

CHIP ID

'F2'hex

VERSION Number

'00'hex

IRQ Level

DMA Channel

Note 1

Software Select A

Note 1

Software Select B

Note 1

Note 1: The default values for these registers assume the values that have been programmed in chip-

level configuration registers.

SMSC ID (Addresses 0 - 1)

The SMSC ID registers contain a 16 bit

manufacturer identification code.

Address zero

contains the high byte of this code, address one

contains the low byte.

Chip ID (Address 2)

The Chip ID register specifically identifies this

SMSC product.

Version Number (Address 3)

The Version Number register identifies the

revision-level of the product referenced by the

Chip ID register.

IRQ Level/ DMA Channel (Address 4)

IRQ Level, bits 4 - 7

The IRQ Level bits identify the current active IRQ

number for this device.

The value comes

from the 4 bit IRQ Level Bus found in the

Interface Description.

DMA Channel, bits 0 - 3

The DMA Channel bits identify the current active

DMA Channel number for this device. The value

comes from the 4 bit DMA Channel Bus found in

the Interface Description.

Software Select A (Address 5)

The Software Select A register is software-only

controlled from a chip-level configuration register

(see the IrCC 2.0-Specific Chip-Level Controls

section on page 7).

Software Select B (Address 6)

The Software Select B register is software-only

controlled from a chip-level configuration register

(see the IrCC 2.0-Specific Chip-Level Controls

section on page 7).

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