PCF85103C-2P datasheet(4/20 Pages) PHILIPS

4 / 20 page

Philips Semiconductors

PCF85103C-2

256

× 8-bit CMOS EEPROM with I2C-bus interface

Product data

Rev. 02 — 09 May 2002

4 of 20

9397 750 09646

Pinning information

6.1 Pinning

6.2 Pin description

Device addressing

[1]

The Most Signiﬁcant Bit (MSB) ‘b7’ is sent ﬁrst.

A2, A1, A0 are hardware selectable pins.

A system could have up to eight PCF85103C-2 devices on the same I2C-bus,

equivalent to a 16 kbit EEPROM or 8 pages of 256 bytes of memory.

The eight addresses are deﬁned by the state of the A0, A1, A2 inputs (logic level ‘1’

when connected to VDD, logic level ‘0’ when connected to GND). Figure 3 shows the

various address combinations.

Fig 2.

Pin conﬁguration.

VSS

SDA

SCL

N.C.

VDD

002aaa251

Table 3:

Pin description

Symbol

Description

address input 0

address input 1

address input 2

VSS

negative supply voltage

SDA

serial data input/output (I2C-bus)

SCL

serial clock input (I2C-bus)

N.C.

no connect

VDD

positive supply voltage

Table 4:

Device address code

Selection

Device code

Chip Enable

R/W

Bit

b7[1]

Device

R/W

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