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PCF8574P データシート(PDF) 15 Page - NXP Semiconductors |
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PCF8574P データシート(HTML) 15 Page - NXP Semiconductors |
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15 / 24 page ![]() 1997 Apr 02 15 Philips Semiconductors Product specification Remote 8-bit I/O expander for I2C-bus PCF8574 11 I2C-BUS TIMING CHARACTERISTICS Note 1. All the timing values are valid within the operating supply voltage and ambient temperature range and refer to VIL and VIH with an input voltage swing of VSS to VDD. SYMBOL PARAMETER MIN. TYP. MAX. UNIT I2C-BUS TIMING (see Fig.15; note 1) fSCL SCL clock frequency −− 100 kHz tSW tolerable spike width on bus −− 100 ns tBUF bus free time 4.7 −−µs tSU;STA START condition set-up time 4.7 −−µs tHD;STA START condition hold time 4.0 −−µs tLOW SCL LOW time 4.7 −−µs tHIGH SCL HIGH time 4.0 −−µs tr SCL and SDA rise time −− 1.0 µs tf SCL and SDA fall time −− 0.3 µs tSU;DAT data set-up time 250 −− ns tHD;DAT data hold time 0 −− ns tVD;DAT SCL LOW to data out valid −− 3.4 µs tSU;STO STOP condition set-up time 4.0 −−µs Fig.15 I2C-bus timing diagram. handbook, full pagewidth PROTOCOL SCL SDA MBD820 BIT 0 LSB (R/W) t HD;STA t SU;DAT t HD;DAT t VD;DAT t SU;STO t f r t t BUF t SU;STA t LOW t HIGH 1 / f SCL START CONDITION (S) BIT 7 MSB (A7) BIT 6 (A6) ACKNOWLEDGE (A) STOP CONDITION (P) |
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