CLRC663 datasheet(41/177 Pages) NXP

41 / 177 page

NXP Semiconductors

CLRC663

High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus

001aan357

-1.0

time ( s)

1.0

3.0

5.0

(V)

7.0

Figure 27. Example 2: overshoot_t1 = 0d; overhoot_t2 = 5d

8.6.2.2 Bit generator

The default coding of a data stream is done by using the Bit-Generator. It is activated when the value of

TxFrameCon.DCodeType is set to 0000 (bin). The Bit-Generator encodes the data stream byte-wise and can

apply the following encoding steps to each data byte.

1. Add a start-bit of specified type at beginning of every byte

2. Add a stop-bit and EGT bits of a specified type. The maximum number of EGT bit is 6, only full bits are

supported

3. Add a parity-bit of a specified type

4. TxLastBits (skips a given number of bits at the end of the last byte in a frame)

5. Encrypt data-bit (MIFARE Classic encryption)

It is not possible to skip more than 8 bit of a single byte!

By default, data bytes are always treated LSB first.

8.6.3 Receiver circuitry

8.6.3.1 General

The CLRC663 features a versatile quadrature receiver architecture with fully differential signal input at RXP and

RXN. It can be configured to achieve optimum performance for reception of various 13.56 MHz based protocols.

For all processing units various adjustments can be made to obtain optimum performance.

8.6.3.2 Block diagram

The following figure shows the block diagram of the receiver circuitry. The receiving process includes several

steps. First the quadrature demodulation of the carrier signal of 13.56 MHz is done. Several tuning steps in this

circuit are possible.

CLRC663

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5.3 — 3 January 2024

41 / 177

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