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TSL2580CS データシート(PDF) 22 Page - OSRAM GmbH |
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TSL2580CS データシート(HTML) 22 Page - OSRAM GmbH |
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22 / 53 page  ams Datasheet Page 21 [v1-00] 2016-Apr-05 Document Feedback TSL2580, TSL2581 − Register Set Control Register (00h) The CONTROL register primarily used to power the TSL258x device up and down as shown in Figure 28. Figure 28: Control Register Note(s): 1. ADC_EN and POWER must be asserted before the ADC changes will operate correctly. After POWER is asserted, a 2-ms delay is required before asserting ADC_EN. 2. The TSL258x device registers should be configured before ADC_EN is asserted. 76 5 4 3 2 1 0 Resv Resv ADC_INTR ADC_VALID Resv Resv ADC_EN POWER Field Bits Description Resv 7:6 Reserved. Write as 0. ADC_INTR 5 ADC Interrupt. Read only. Indicates that the device is asserting an interrupt. ADC_VALID 4 ADC Valid. Read only. Indicates that the ADC channel has completed an integration cycle. Resv 3 Reserved. Write as 0. Resv 2 Reserved. Write as 0. ADC_EN 1 ADC Enable. This field enables the two ADC channels to begin integration. Writing a 1 activates the ADC channels, and writing a 0 disables the ADCs. POWER 0 Power On. Writing a 1 powers on the device, and writing a 0 turns it off. |
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