TSL26723FN datasheet(28/47 Pages) OSRAM

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ams Datasheet

Page 27

[v1-01] 2019-Nov-20

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TSL2672 − Principles Of Operation

Wait Time Register (0x03)

Wait time is set 2.73 ms increments unless the WLONG bit is

asserted in which case the wait times are 12x longer. WTIME is

programmed as a 2’s complement number. Upon power up, the

wait time register is set to 0xFF.

Figure 31:

Wait Time Register

Note(s):

1. The Proximity Wait Time Register should be configured before PEN is asserted.

Proximity Interrupt Threshold Registers (0x08 - 0x0B)

The proximity interrupt threshold registers provide the upper

and lower threshold values to the proximity interrupt

comparators. See Interrupts in the Principles Of Operation

section for detailed information. Upon power up, the interrupt

threshold registers reset to 0x00.

Figure 32:

Proximity Interrupt Threshold Registers

Field

Bits

Description

WTIME

7:0

VALUE

WAIT TIME

TIME (WLONG = 0)

TIME (WLONG = 1)

0xFF

2.73 ms

0.033 s

0xB6

202 ms

2.4 s

0x00

256

699 ms

8.4 s

Address

Bits

Description

PILTL

0x08

7:0

Proximity low threshold low byte

PILTH

0x09

7:0

Proximity low threshold high byte

PIHTL

0x0A

7:0

Proximity high threshold low byte

PIHTH

0x0B

7:0

Proximity high threshold high byte

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