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CS42435-DMZ データシート(PDF) 48 Page - Cirrus Logic |
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CS42435-DMZ データシート(HTML) 48 Page - Cirrus Logic |
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48 / 58 page ![]() 48 DS685F1 CS42435 7.14 Status Mask (Address 1Ah) Default = 0000 Function: The bits of this register serve as a mask for the error sources found in the register “Status (Address 19h) (Read Only)” on page 47. If a mask bit is set to 1, the error is unmasked, meaning that its occurrence will affect the status register. If a mask bit is set to 0, the error is masked, meaning that its occurrence will not affect status register. The bit positions align with the corresponding bits in the Status register. 765 4 3 2 1 0 Reserved Reserved Reserved Reserved CLK Error_M Reserved ADC2_OVFL_M ADC1_OVFL_M |
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