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DSP56362P データシート(PDF) 74 Page - Freescale Semiconductor, Inc

部品番号 DSP56362P
部品情報  24-Bit Audio Digital Signal Processor
PDF  152 Pages
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メーカー  FREESCALE [Freescale Semiconductor, Inc]
ホームページ  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

DSP56362P データシート(HTML) 74 Page - Freescale Semiconductor, Inc

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Parallel Host Interface (HDI08) Timing
DSP56362 Technical Data, Rev. 4
3-48
Freescale Semiconductor
Figure 3-27 Host Interrupt Vector Register (IVR) Read Timing Diagram
Figure 3-28 Read Timing Diagram, Non-Multiplexed Bus
8 The write data strobe is HWR in the dual data strobe mode and HDS in the single data strobe mode.
9 The data strobe is host read (HRD) or host write (HWR) in the dual data strobe mode and host data strobe (HDS) in the single
data strobe mode.
10 The host request is HOREQ in the single host request mode and HRRQ and HTRQ in the double host request mode.
11 In this calculation, the host request signal is pulled up by a 4.7 k
Ω resistor in the open-drain mode.
HACK
HD7–HD0
HOREQ
329
317
318
328
326
327
AA1105
HRD, HDS
HA0–HA2
HCS
HD0–HD7
HOREQ,
327
332
319
318
317
330
329
337
336
328
326
338
341
340
333
AA0484
HRRQ,
HTRQ



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