HCS08 datasheet(166/290 Pages) MOTOROLA

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Timer/PWM (TPM) Module

MC9S08GB/GT

166

MOTOROLA

CLKSB:CLKSA — Clock Source Select

As shown in Table 10-1, this 2-bit field is used to disable the TPM system or select one of three clock

sources to drive the counter prescaler. The external source and the crystal source are synchronized to

the bus clock by an on-chip synchronization circuit.

PS2:PS1:PS0 — Prescale Divisor Select

This 3-bit field selects one of eight divisors for the TPM clock input as shown in Table 10-2. This

prescaler is located after any clock source synchronization or clock source selection, so it affects

whatever clock source is selected to drive the TPM system.

10.7.2 Timer x Counter Registers (TPMxCNTH:TPMxCNTL)

The two read-only TPM counter registers contain the high and low bytes of the value in the TPM counter.

Reading either byte (TPMxCNTH or TPMxCNTL) latches the contents of both bytes into a buffer where

they remain latched until the other byte is read. This allows coherent 16-bit reads in either order. The

Table 10-1 TPM Clock Source Selection

CLKSB:CLKSA

TPM Clock Source to Prescaler Input

0:0

No clock selected (TPM disabled)

0:1

Bus rate clock (BUSCLK)

1:0

Fixed system clock (XCLK)

1:1

External source (TPMx Ext Clk)(1)(2)

NOTES:

1. The maximum frequency that is allowed as an external clock is one-fourth of the bus

frequency.

2. When the TPMxCH0 pin is selected as the TPM clock source, the corresponding

ELS0B:ELS0A control bits should be set to 0:0 so channel 0 does not try to use the same

pin for a conflicting function.

Table 10-2 Prescale Divisor Selection

PS2:PS1:PS0

TPM Clock Source Divided-By

0:0:0

0:0:1

0:1:0

0:1:1

1:0:0

1:0:1

1:1:0

1:1:1

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