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PHT8N06LT データシート(PDF) 2 Page - NXP Semiconductors

部品番号 PHT8N06LT
部品情報  TrenchMOS transistor Logic level FET
PDF  9 Pages
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メーカー  PHILIPS [NXP Semiconductors]
ホームページ  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

PHT8N06LT データシート(HTML) 2 Page - NXP Semiconductors

  PHT8N06LT Datasheet HTML 1Page - NXP Semiconductors PHT8N06LT Datasheet HTML 2Page - NXP Semiconductors PHT8N06LT Datasheet HTML 3Page - NXP Semiconductors PHT8N06LT Datasheet HTML 4Page - NXP Semiconductors PHT8N06LT Datasheet HTML 5Page - NXP Semiconductors PHT8N06LT Datasheet HTML 6Page - NXP Semiconductors PHT8N06LT Datasheet HTML 7Page - NXP Semiconductors PHT8N06LT Datasheet HTML 8Page - NXP Semiconductors PHT8N06LT Datasheet HTML 9Page - NXP Semiconductors  
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Philips Semiconductors
Product specification
TrenchMOS
™ transistor
PHT8N06LT
Logic level FET
THERMAL RESISTANCES
SYMBOL
PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
R
th j-sp
From junction to solder point
Mounted on any PCB
12
15
K/W
R
th j-amb
From junction to ambient
Mounted on PCB of Fig.17
-
70
K/W
STATIC CHARACTERISTICS
T
j= 25˚C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
(BR)DSS
Drain-source breakdown
V
GS = 0 V; ID = 0.25 mA
55
-
-
V
voltage
T
j = -55˚C
50
-
-
V
V
GS(TO)
Gate threshold voltage
V
DS = VGS; ID = 1 mA
1.0
1.5
2.0
V
T
j = 150˚C
0.6
-
-
V
T
j = -55˚C
-
-
2.3
V
I
DSS
Zero gate voltage drain current
V
DS = 55 V; VGS = 0 V;
-
0.05
10
µA
T
j = 150˚C
-
-
100
µA
I
GSS
Gate source leakage current
V
GS = ±5 V
-
0.02
1
µA
T
j = 150˚C
-
-
5
µA
±V
(BR)GSS
Gate source breakdown voltage I
G = ±1 mA
10
-
-
V
R
DS(ON)
Drain-source on-state
V
GS = 5 V; ID = 5 A
-
65
80
m
Ω
resistance
T
j = 150˚C
-
-
148
m
Ω
DYNAMIC CHARACTERISTICS
T
mb = 25˚C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
g
fs
Forward transconductance
V
DS = 25 V; ID = 5 A; Tj = 25˚C
4
-
-
S
Q
g(tot)
Total gate charge
I
D = 7 A; VDD = 44 V; VGS = 5 V
-
11.2
-
nC
Q
gs
Gate-source charge
-
2.2
-
nC
Q
gd
Gate-drain (Miller) charge
-
5
-
nC
C
iss
Input capacitance
V
GS = 0 V; VDS = 25 V; f = 1 MHz
-
500
650
pF
C
oss
Output capacitance
-
110
135
pF
C
rss
Feedback capacitance
-
60
85
pF
t
d on
Turn-on delay time
V
DD = 30 V; ID = 7 A;
-
10
15
ns
t
r
Turn-on rise time
V
GS = 5 V; RG = 10 Ω;
-
30
50
ns
t
d off
Turn-off delay time
-
30
45
ns
t
f
Turn-off fall time
T
j = 25˚C
-
30
40
ns
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
T
j = -55 to 175˚C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
I
DR
Continuous reverse drain
T
sp = 25˚C
-
-
7.5
A
current
I
DRM
Pulsed reverse drain current
T
sp = 25˚C
-
-
40
A
V
SD
Diode forward voltage
I
F = 5 A; VGS = 0 V
-
0.85
1.1
V
t
rr
Reverse recovery time
I
F = 5 A; -dIF/dt = 100 A/µs;
-
38
-
ns
Q
rr
Reverse recovery charge
V
GS = -10 V; VR = 30 V
-
0.2
-
µC
January 1998
2
Rev 1.100



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