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STPMIC25 データシート(PDF) 19 Page - STMicroelectronics |
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STPMIC25 データシート(HTML) 19 Page - STMicroelectronics |
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19 / 145 page ![]() Symbol Parameter Test conditions Min. Typ. Max. Unit tSD_BCK Shutdown duration From VOUT = 1.5 V to VOUT < 0.2 V, 2.8 V < VBUCKIN < 5.5 V, IOUT < 1 mA Fast PD ms 1 0.3 1. Guaranteed by design - not tested in production. Load transient performances are strongly impacted by the external passive component characteristics. The load transient is also influenced by the parasitic elements of the PCB layout. For more info see the forthcomingAN. 2. Output ripple voltage is the result of the inductor ripple current flowing through the output capacitor and depends on the capacitance value, ESR, and ESL. The actual output ripple voltage is also influenced by the parasitic elements of the PCB layout. 3. See 1: startup sequence 4. Guaranteed by design - not tested in production STPMIC25 Electrical and timing characteristics DS14278 - Rev 3 page 19/145 |
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