Figure 46. Maximum output current for safe operation on SO8 package

Figure 47. Maximum output current for safe operation on DFN8 package

5.7

Capacitive load and stability

A stability analysis must be performed for large capacitive loads over 22 pF. Increasing the load capacitance to

high values produces gain peaking in the frequency response, with overshoot and ringing in the step response.

Generally, unity gain configuration is the worst situation for stability and the ability to drive large capacitive loads.

For additional capacitive load drive capability in unity gain configurations, stability can be improved by inserting a

small resistor RISO (10 Ω to 47 Ω) in series with the output. This resistor significantly reduces ringing while

maintaining DC performance for purely capacitive loads. However, if there is a resistive load in parallel with the

capacitive load, a voltage divider is created introducing a gain error at the output and slightly reducing the output

swing. The error introduced is proportional to the ratio RISO/RL. RISO modifies the maximum capacitive load

acceptable from a stability point of view as described in the figure below:

TSB952

Application information

DS14576 - Rev 1

page 21/36