SN751508, SN751518

DC PLASMA DISPLAY DRIVERS

SLDS035 – JANUARY 1987 – REVISED NOVEMBER 1989

4

POST OFFICE BOX 655303

FUNCTION TABLE

CONTROL INPUTS

SHIFT REGISTERS

LATCHES

OUTPUTS

FUNCTION

CLOCK

LATCH

STROBE

SUSTAIN

SHIFT REGISTERS

R1 THRU R32

LATCHES

LC1 THRU

SERIAL

Q1 THRU Q32

CLOCK

ENABLE

STROBE

SUSTAIN

R1 THRU R32

LC32

S01

S02

Q1 THRU Q32

Load

↓

X

X

X

Load and shift†

Determined by

LATCH

R31

R32

Determined by

Load

No

↓

XX

X

Load and shift

No change

LATCH

ENABLE‡

R31

R32

y

SUSTAIN and STROBE

Latch

X

L

X

X

As determined

Stored data

R31

R32

Determined by

Enable

X

H

X

X

above

New data

R31

R32

y

SUSTAIN and STROBE

Strobe

X

X

L

H

As determined

Determined by

LATCH

R31

R32

LC1 thru LC32

Strobe

X

X

H

H

above

LATCH

ENABLE‡

R31

R32

All on (high)

Sustain

X

X

X

L

As determined

Determined by

LATCH

R31

R32

All off

Sustain

X

X

X

L

above

LATCH

ENABLE‡

R31

R32

All off

H = high level,

L = low level,

X = irrelevant,

↓ = high-to-low transition

† Each even-numbered shift register stage takes on the state of the next-lower even-numbered stage, and likewise each odd-numbered shift

register stage takes on the state of the next-lower odd-numbered stage; i.e., R32 takes on the state of R30, R30 takes on the state of R28, ...

R4 takes on the state of R2, R2 takes on the state of DATA IN2, R31 takes on the state of R29, R29 takes on the state of R27, ... R3 takes on

the state of R1, and R1 takes on the state on DATA IN1.

‡ New data enters the latches while LATCH ENABLE is high. This data is stored while LATCH ENABLE is low.

typical operating sequence

. . .

CLOCK

DATA IN

Shift

Contents

Register

LATCH ENABLE

Latch Contents

STROBE

SUSTAIN

Q Outputs

Off State

Valid

Off State

Previously Stored Data

New Data Valid

Invalid

Valid

Valid

Irrelevant