25LC010AT-ESLASHMS datasheet(11/28 Pages) MICROCHIP

11 / 28 page

Preliminary

DS21832C-page 11

25AA010A/25LC010A

2.6

Write Status Register Instruction

(WRSR)

The Write Status Register instruction (WRSR) allows the

user to write to the nonvolatile bits in the STATUS reg-

ister as shown in Table 2-2. See Figure 2-7 for the

WRSR

timing sequence. Four levels of protection for the

array are selectable by writing to the appropriate bits in

the STATUS register. The user has the ability to write-

protect none, one, two or all four of the segments of the

array as shown in Table 2-3.

TABLE 2-3:

ARRAY PROTECTION

FIGURE 2-7:

WRITE STATUS REGISTER TIMING SEQUENCE (WRSR)

BP1

BP0

Array Addresses

Write-Protected

none

upper 1/4

(60h-7Fh)

upper 1/2

(40h-7Fh)

all

(00h-7Fh)

1011

12131415

instruction

data to STATUS register

high-impedance

SCK

Note:

An internal write cycle (TWC) is initiated on the rising edge of CS after a valid write STATUS register

sequence.

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