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P4C1023-70CWC データシート(PDF) 4 Page - Pyramid Semiconductor Corporation

部品番号 P4C1023-70CWC
部品情報  LOW POWER 128K x 8 SINGLE CHIP ENABLE CMOS STATIC RAM
PDF  11 Pages
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メーカー  PYRAMID [Pyramid Semiconductor Corporation]
ホームページ  http://www.pyramidsemiconductor.com
Logo PYRAMID - Pyramid Semiconductor Corporation

P4C1023-70CWC データシート(HTML) 4 Page - Pyramid Semiconductor Corporation

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P4C1023/P4C1023L
Page 4 of 11
Document # SRAM126 REV OR
Notes:
1. WE is HIGH for READ cycle.
2. CE and OE are LOW for READ cycle.
3. ADDRESS must be valid prior to, or coincident with later of
CE transition LOW.
READ CYCLE NO. 1 (OE
OE
OE
OE
OE CONTROLLED)(1)
READ CYCLE NO. 2 (ADDRESS CONTROLLED)
READ CYCLE NO. 3 (CE
CE
CE
CE
CE CONTROLLED)
4. Transition is measured ± 200 mV from steady state voltage prior
to change, with loading as specified in Figure 1. This parameter
is sampled and not 100% tested.
5. READ Cycle Time is measured from the last valid address to the
first transitioning address.



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