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CD74HC4094DYYR データシート(PDF) 7 Page - Texas Instruments

部品番号 CD74HC4094DYYR
部品情報  CDx4HC4094, CD74HCT4094 High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State
PDF  32 Pages
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メーカー  TI [Texas Instruments]
ホームページ  http://www.ti.com
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CD74HC4094DYYR データシート(HTML) 7 Page - Texas Instruments

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5.6 Switching Characteristics
Input tr, tf = 6 ns. Unless otherwise specified, CL = 50pF Parameter Measurement Information
PARAMETER
VCC (V)
25°C
–40 to 85°C
–55 to 125°C
UNIT
MIN
TYP
MAX
MIN
MAX
MIN
MAX
HC TYPES
tpd
Propagation delay time
CP to QS1
2
150
190
225
ns
4.5
12(3)
30
38
45
6
26
33
38
tpd
CP to QS2
2
135
170
205
ns
4.5
11(3)
27
34
41
6
23
29
35
tpd
CP to Qn
2
195
245
295
ns
4.5
16(3)
39
49
59
6
33
42
50
tt
STR to Qn
2
180
225
270
ns
4.5
36
45
54
6
31
38
46
tPZH,
tPZL
Output enable to Qn
2
175
220
265
ns
4.5
35
44
53
6
30
37
45
tPHZ,
tPLZ
Output disable to Qn
2
125
155
190
ns
4.5
25
31
38
6
21
26
32
tTLH,
tTHL
Output transition time
2
75
95
110
ns
4.5
15
19
22
6
13
16
19
tPHZ,
tPLZ
Output disabling time
5
10(3)
ns
ƒMAX
Maximum CP frequency
5
60(3)
MHz
CIN
Input capacitance
10
10
10
pF
CPD
Power dissipation capacitance(1),
(2)
5
90(3)
pF
CO
Tri-state output capacitance
15
15
15
pF
HCT TYPES
tPLH,
tPHL
Propagation delay time
CP to QS1
4.5
16(3)
39
ns
CP to QS2
4.5
15(3)
36
ns
CP to Qn
4.5
18(3)
43
ns
STR to Qn
4.5
39
ns
tPZH,
tPZL
Output enable to Qn
4.5
35
ns
tPHZ,
tPLZ
Output disable to Qn
4.5
35
ns
tTLH,
tTHL
Output transition time
4.5
15
ns
tPHZ,
tPLZ
Output disabling time
5
14(3)
ns
ƒMAX
Maximum CP frequency
5
60(3)
MHz
CIN
Input capacitance
10
10
10
pF
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CD54HC4094, CD74HC4094, CD74HCT4094
SCHS211F – NOVEMBER 1997 – REVISED MARCH 2022
Copyright © 2022 Texas Instruments Incorporated
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Product Folder Links: CD54HC4094 CD74HC4094 CD74HCT4094



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