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SC1109BSTR データシート(PDF) 9 Page - Semtech Corporation |
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SC1109BSTR データシート(HTML) 9 Page - Semtech Corporation |
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9 / 19 page ![]() 9 2004 Semtech Corp. www.semtech.com POWER MANAGEMENT SC1109 4) The Output Capacitor(s) (Cout) should be located as close to the load as possible, fast transient load cur- rents sre supplied by Cout only, and connections between Cout and the load must be short, wide copper areas to minimize inductance and resistance. 5) The SC1109 is best placed over a quiet ground plane area, avoid pulse currents in the Cin, Q1, Q2 loop flowing in this area. GND should be returned to the ground plane close to the package and close to the ground side of (one of) the output capacitor(s). If this is not possible, the GND pin may be connected to the ground path be- tween the Output Capacitor(s) and the Cin, Q1, Q2 loop. Under no circumstances should GND be returned to a ground inside the Cin, Q1, Q2 loop. Vout 5V + + Application Information (Cont.) 6) BST for the SC1109 should be supplied from the 12V supply, the BST pin should be decoupled directly to GND by a 0.1mF ceramic capacitor, trace lengths should be as short as possible. If a 12V supply is not available, a classi- cal boot strap method could be implemented to achieve the upper MOSFETs gate drive. 7) The Phase connection should be short . 8) Ideally, the grounds for the two LDO sections should be returned to the ground side of (one of) the output capacitor(s). |
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