| データシートサーチシステム |
|
MSM6688 データシート(PDF) 52 Page - OKI electronic componets |
|
|
|||||||||||||||||||||||||||||
MSM6688 データシート(HTML) 52 Page - OKI electronic componets |
|
52 / 167 page ![]() FEDL6688-6688L-04 OKI Semiconductor MSM6688/6688L 52/167 Pin QFP TQFP Symbol Type Description 40 41 42 43 45 46 48 49 CS1 CS2 CS3 CS4 O (Chip Select) Used to connect the CS pin of serial register and the CS (CS1, CS2, CS3) pins of each serial voice ROM. 31 32 35 36 RSEL1 RSEL2 I (Register Select) These are used to select the number of external serial registers. 10 11 MCUM I This pin is used to select either the stand-alone mode or the microcontroller interface mode. Low level: Stand-alone mode High level: Microcontroller interface mode 53 61 RESET I A high input level at this pin causes the MSM6688/6688L to be initialized and to go into the power down state. 35 40 PDWN I (Power Down) When a low level is input to this pin, the MSM6688 goes to the power down state. Unlike the RESET pin, this pin does not force to reset the MSM6688/6688L. When an low level is applied to this PDWN pin during recording operation, the MSM6688/6688L is halted, and will be maintained in the power down state while PDWN is low. After this pin is restored to a high level, postprocessing for recording will be performed. 1 2 3 4 1 2 3 4 D0 D1 D2 D3 I/O Bi-directional data bus to transfer commands and data to and from an external microcontroller. 54 62 WR I Write pulse input pin. Inputting a low pulse to this WR pin causes a command or data to be input via D0-D3 pins. 55 63 RD I Read pulse input pin. Inputting a low pulse to this RD pin causes status bits or data to be output via D0-D3 pins. 56 11 64 13 CE CE I Chip enable input pins. When the CE pin is set to a low level or the CE pin is set to a high level, the write pulse (WR), read pulse (RD) can be accepted. When the CE pin is set to a high level or CE pin is set to a low level, the write pulse (WR) and read pulse (RD) cannot be accepted so that data cannot be transferred to and from via D0-D3 pins. 5 6 BUSY O Outputs a high level while a command is being executed. When this pin is held high, do not apply any data to D0-D3 pins. The state of this BUSY pin is the same as the contents of the BUSY bit of the status register. 6 7 RPM O Outputs a high level during recording or playback operation. The state of this RPM is the same as the contents of the RPM bit of the status register. 7 8 VPM O Outputs a high level during the standby for voice after the start of voice triggered recording and the record/playback is stopped temporarily by inputting the PAUSE command. The state of this VPM pin is the same as the contents of the VPM bit of the status register. RSEL2 L L H H RSEL1 L H L H Number of serial registers 1 2 3 4 |
|
リンク URL |
| ALLDATASHEETはお客様のビジネスに役立ちますか? [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | データシートへのリンク | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |