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CDCE913

CDCEL913

SCAS849A – JUNE 2007 – REVISED AUGUST 2007

Table 8. Configuration Register,

External Control Terminals

Y1

PLL1 Settings

External Control

Output Selection

Frequency Selection

SSC Selection

Output Selection

Pins

S2

S1

S0

Y1

FS1

SSC1

Y2Y3

0

0

0

0

Y1_0

FS1_0

SSC1_0

Y2Y3_0

1

0

0

1

Y1_1

FS1_1

SSC1_1

Y2Y3_1

2

0

1

0

Y1_2

FS1_2

SSC1_2

Y2Y3_2

3

0

1

1

Y1_3

FS1_3

SSC1_3

Y2Y3_3

4

1

0

0

Y1_4

FS1_4

SSC1_4

Y2Y3_4

5

1

0

1

Y1_5

FS1_5

SSC1_5

Y2Y3_5

6

1

1

0

Y1_6

FS1_6

SSC1_6

Y2Y3_6

7

1

1

1

Y1_7

FS1_7

SSC1_7

Y2Y3_7

04h

13h

10h–12h

15h

(1)

Address Offset refers to the byte address in the Configuration Register in Table 9 and Table 10.

14

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