TMP86FS28DFG datasheet(111/272 Pages) TOSHIBA

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TMP86FS28DFG

byte and the upper byte in this order (it is recommended to write the register with a 16-bit access instruction). Writing only

the lower byte (TC11DRAL and TC11DRBL) does not enable the setting of the timer register.

Note 3: To set the mode, source clock, PPG output control and timer F/F control, write to TC11CR1 during TC11S=00. Set the

timer F/F10 control until the first timer start after setting the PPG mode.

Note 4: Auto-capture can be used only in the timer, event counter, and window modes.

Note 5: To set the timer registers, the following relationship must be satisfied.

TC11DRA > TC11DRB > 1 (PPG output mode), TC11DRA > 1 (other modes)

Note 6: Set TFF11 to “0” in the mode except PPG output mode.

Note 7: Set TC11DRB after setting TC11M to the PPG output mode.

Note 8: When the STOP mode is entered, the start control (TC11S) is cleared to “00” automatically, and the timer stops. After the

STOP mode is exited, set the TC11S to use the timer counter again.

Note 9: Use the auto-capture function in the operative condition of TC11. A captured value may not be fixed if it's read after the

execution of the timer stop or auto-capture disable. Read the capture value in a capture enabled condition.

Note 10:Since the up-counter value is captured into TC11DRB by the source clock of up-counter after setting TC11CR<ACAP11>

to "1". Therefore, to read the captured value, wait at least one cycle of the internal source clock before reading TC11DRB

for the first time.

8.2.3 Function

TimerCounter 11 has six types of operating modes: timer, external trigger timer, event counter, window,

pulse width measurement, programmable pulse generator output modes.

8.2.3.1 Timer mode

In the timer mode, the up-counter counts up using the internal clock. When a match between the up-counter and the timer

cleared, the up-counter restarts counting. Setting TC11CR<ACAP11> to “1” captures the up-counter value into the timer

A captured value may not be fixed if it's read after the execution of the timer stop or auto-capture disable. Read the capture

value in a capture enabled condition. Since the up-counter value is captured into TC11DRB by the source clock of up-

counter after setting TC11CR<ACAP11> to "1". Therefore, to read the captured value, wait at least one cycle of the internal

source clock before reading TC11DRB for the first time.

Table 8-3 Internal Source Clock for TimerCounter 11 (Example: fc

= 16 MHz, fs = 32.768 kHz)

TC11CK

NORMAL1/2, IDLE1/2 mode

SLOW, SLEEP mode

DV7CK = 0

DV7CK = 1

Resolution

[

µs]

Maximum Time Setting

[s]

Resolution

[

µs]

Maximum Time Setting

[s]

Resolution

[

µs]

Maximum

Time Set-

ting [s]

128

8.39

244.14

16.0

244.14

16.0

8.0

0.524

8.0

0.524

–

0.5

32.77 m

0.5

32.77 m

–

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