TMP86FS28DFG datasheet(112/272 Pages) TOSHIBA

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Page 100

8. 16-Bit TimerCounter (TC10,TC11)

8.2 16-Bit TimerCounter 11

TMP86FS28DFG

Note: Since the up-counter value is captured into TC11DRB by the source clock of up-counter after setting TC11CR<ACAP11> to

"1". Therefore, to read the captured value, wait at least one cycle of the internal source clock before reading TC11DRB for the

first time.

Figure 8-10 Timer Mode Timing Chart

Example 1 :Setting the timer mode with source clock fc/211 [Hz] and generating an interrupt 1 second later

(fc

= 16 MHz, TBTCR<DV7CK> = “0”)

LDW

(TC11DRA), 1E84H

; Sets the timer register (1 s

÷ 211/fc = 1E84H)

; IMF

= “0”

SET

(EIRL). 2

; Enables INTTC11

; IMF

= “1”

(TC11CR), 00000000B

; Selects the source clock and mode

(TC11CR), 00010000B

; Starts TC11

Example 2 :Auto-capture

(TC11CR), 01010000B

; ACAP11

← 1

WA, (TC11DRB)

; Reads the capture value

Match detect

ACAP11

TC11DRB

TC11DRA

INTTC11 interruput request

Source clock

Counter

Source clock

Counter

(a) Timer mode

(b) Auto-capture

Timer start

Counter clear

Capture

n + 1

m + 2

m + 1

Capture

m + 2

m + 1

n + 1

- 1

- 2

- 1

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