LM10506 datasheet(13/43 Pages) TI2

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COMPARATOR

SPI

UVLO

REGISTERS

LDO

SW1

BUCK1

FB_B1

GND_B1

SW_B1

VIN_B1

SW3

BUCK3

GND_B3

FB_B3

SW_B3

VIN_B3

TSD

VCOMP

IRQ

RESET

STANDBY

HL_B3

CONTROL

LOGIC

OVLO

SW2

BUCK2

GND_B2

FB_B2

SW_B2

VIN_B2

HL_B2

LM10506

www.ti.com

SNVS729F – SEPTEMBER 2011 – REVISED AUGUST 2014

8 Detailed Description

The LM10506 is a highly efficient and integrated Power Management Unit for Systems-on-a-Chip (SoCs), ASICs,

and processors. It operates cooperatively and communicates with processors over an SPI interface with output

Voltage programmability and Standby Mode.

The device incorporates three high-efficiency synchronous buck regulators and one LDO that deliver four output

voltages from a single power source. The device also includes a SPI-programmable Comparator Block that

provides an interrupt output signal.

8.1 Functional Block Diagram

8.2 Feature Description

8.2.1 Buck Regulators Operation

A buck converter contains a control block, a switching PFET connected between input and output, a synchronous

rectifying NFET connected between the output and ground and a feedback path. The following figure shows the

block diagram of each of the three buck regulators integrated in the device.

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