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LP8900 データシート(PDF) 2 Page - Texas Instruments

部品番号 LP8900
部品情報  LP8900 200-mA Ultra-Low-Noise Dual LDO For RF and Analog Circuits
PDF  23 Pages
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メーカー  TI2 [Texas Instruments]
ホームページ  https://www.ti.com
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LP8900 データシート(HTML) 2 Page - Texas Instruments

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LP8900
SNVS542E – MAY 2008 – REVISED JUNE 2016
www.ti.com
Product Folder Links: LP8900
Submit Documentation Feedback
Copyright © 2008–2016, Texas Instruments Incorporated
Table of Contents
1
Features .................................................................. 1
2
Applications ........................................................... 1
3
Description ............................................................. 1
4
Revision History..................................................... 2
5
Default Device Options ......................................... 3
6
Pin Configuration and Functions ......................... 3
7
Specifications......................................................... 4
7.1
Absolute Maximum Ratings ...................................... 4
7.2
ESD Ratings.............................................................. 4
7.3
Recommended Operating Conditions ....................... 4
7.4
Thermal Information .................................................. 4
7.5
Electrical Characteristics........................................... 5
7.6
Timing Requirements ................................................ 6
7.7
Typical Characteristics .............................................. 7
8
Detailed Description .............................................. 9
8.1
Overview ................................................................... 9
8.2
Functional Block Diagram ......................................... 9
8.3
Feature Description................................................... 9
8.4
Device Functional Modes........................................ 10
9
Application and Implementation ........................ 11
9.1
Application Information............................................ 11
9.2
Typical Application ................................................. 11
10
Power Supply Recommendations ..................... 15
11
Layout................................................................... 16
11.1
Layout Guidelines ................................................. 16
11.2
Layout Example .................................................... 16
11.3
DSBGA Mounting.................................................. 16
11.4
DSBGA Light Sensitivity ....................................... 16
12
Device and Documentation Support ................. 17
12.1
Documentation Support ........................................ 17
12.2
Community Resources.......................................... 17
12.3
Trademarks ........................................................... 17
12.4
Electrostatic Discharge Caution ............................ 17
12.5
Glossary ................................................................ 17
13
Mechanical, Packaging, and Orderable
Information ........................................................... 17
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (August 2015) to Revision E
Page
•
Changed "linear regulator" to "LDO" on page 1 .................................................................................................................... 1
Changes from Revision C (July 2013) to Revision D
Page
•
Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section; add updated Thermal Information values; delete lead
temperature from Ab Max (which is in POA); update pin names to TI nomenclature ........................................................... 1



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