LAN9252TSLASHML datasheet(5/329 Pages) MICROCHIP

部品番号	LAN9252T/ML

部品情報	2/3-Port EtherCAT® Slave Controller with Integrated Ethernet PHYs

PDF	329 Pages

Scroll/Zoom	100%

メーカー	MICROCHIP [Microchip Technology]

ホームページ	http://www.microchip.com

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 2015 Microchip Technology Inc.

DS00001909A-page 5

LAN9252

NRZI

Non Return to Zero Inverted. This encoding method inverts the signal for a “1” and

leaves the signal unchanged for a “0”

N/A

Not Applicable

No Connect

OUI

Organizationally Unique Identifier

Outbound

Refers to data output from the device to the host

PISO

Parallel In Serial Out

PLL

Phase Locked Loop

PTP

Precision Time Protocol

RESERVED

Refers to a reserved bit field or address. Unless otherwise noted, reserved bits must

always be zero for write operations. Unless otherwise noted, values are not guaran-

teed when reading reserved bits. Unless otherwise noted, do not read or write to

reserved addresses.

RTC

Real-Time Clock

Source Address

SFD

Start of Frame Delimiter - The 8-bit value indicating the end of the preamble of an

Ethernet frame.

SIPO

Serial In Parallel Out

SMI

Serial Management Interface

SQE

Signal Quality Error (also known as “heartbeat”)

SSD

Start of Stream Delimiter

UDP

User Datagram Protocol - A connectionless protocol run on top of IP networks

UUID

Universally Unique IDentifier

WORD

16 bits

TABLE 1-1:

GENERAL TERMS (CONTINUED)

Term

Description

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