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TSC2102IDAR データシート(PDF) 8 Page - Texas Instruments

部品番号 TSC2102IDAR
部品情報  PROGRAMMABLE TOUCH SCREEN CONTROLLER WITH INTEGRATED STEREO AUDIO DAC AND HEADPHONE AMPLIFIER
PDF  58 Pages
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メーカー  TI2 [Texas Instruments]
ホームページ  https://www.ti.com
Logo TI2 - Texas Instruments

TSC2102IDAR データシート(HTML) 8 Page - Texas Instruments

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TSC2102
SLAS379A− APRIL 2003 − REVISED JUNE 2004
www.ti.com
8
AUDIO INTERFACE TIMING DIAGRAMS
ts (DI)
th(DI)
LRCK
BCLK
DIN
td(WS)
Figure 1. I2S/LJF/RJF Timing in Master Mode
TYPICAL TIMING REQUIREMENTS
All specifications at 25
°C, IOVDD = 3.3 V, DVDD = 1.8 V(1)
PARAMETER
MIN
MAX
UNITS
td (WS)
LRCK delay
15
ns
ts(DI)
DIN setup
6
ns
th(DI)
DIN hold
6
ns
tr
Rise time
6
ns
tf
Fall time
6
ns
(1) These parameters are based on characterization and are not tested in production.
ts (DI)
th(DI)
LRCK
BCLK
DIN
td(WS)
td(WS)
Figure 2. DSP Timing in Master Mode
TYPICAL TIMING REQUIREMENTS
All specifications at 25
°C, IOVDD = 3.3 V, DVDD = 1.8 V(1)
PARAMETER
MIN
MAX
UNITS
td (WS)
LRCK delay
15
ns
ts(DI)
DIN setup
6
ns
th(DI)
DIN hold
6
ns
tr
Rise time
6
ns
tf
Fall time
6
ns
(1) These parameters are based on characterization and are not tested in production.



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