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LP5521 データシート(PDF) 27 Page - Texas Instruments

部品番号 LP5521
部品情報  LP5521 Three-Channel RGB, White-LED Driver With Internal Program Memory and Integrated Charge Pump
PDF  51 Pages
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メーカー  TI2 [Texas Instruments]
ホームページ  https://www.ti.com
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LP5521 データシート(HTML) 27 Page - Texas Instruments

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LP5521
www.ti.com
SNVS441I – JANUARY 2007 – REVISED NOVEMBER 2016
Product Folder Links: LP5521
Submit Documentation Feedback
Copyright © 2007–2016, Texas Instruments Incorporated
X means do not care whether 1 or 0.
7.5.3.6 Trigger
Wait or send triggers can be used to, for example, synchronize operation between different channels. Send
trigger command takes sixteen 32-kHz clock cycles, and wait for trigger takes at least sixteen 32 kHz clock
cycles. The receiving channel stores sent triggers. Received triggers are cleared by wait for trigger command if
received triggers match to channels defined in the command. Channel waits for until all defined triggers have
been received.
External trigger input signal must be at least two 32-kHz clock cycles (= 61 μs typical) long to be recognized.
Trigger output signal is three 32-kHz clock cycles (92 μs typical) long. External trigger signal is active low; that is,
when trigger is sent/received the pin is pulled to GND. Sent external trigger is masked; that is, the device which
has sent the trigger does not recognize it. If send and wait external trigger are used on the same command, the
send external trigger is executed first, then the wait external trigger.
Table 19. Trigger Command
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
1
1
1
wait trigger <5:0>
send trigger <5:0>
X
EXT
X
B
G
R
EXT
X
B
G
R
NAME
VALUE(d)
DESCRIPTION
wait trigger<5:0>
0-31
Wait for trigger for the channel(s) defined. Several triggers can be defined in the same
command. Bit 0 is R, bit 1 is G, bit 2 is B and bit 5 is external trigger I/O. Bits 3 and 4
are not in use.
send trigger<5:0>
0-31
Send trigger for the channel(s) defined. Several triggers can be defined in the same
command. Bit 0 is R, bit 1 is G, bit 2 is B and bit 5 is external trigger I/O. Bits 3 and 4
are not in use.
X means do not care whether 1 or 0.



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