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BUH515D データシート(PDF) 4 Page - STMicroelectronics |
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BUH515D データシート(HTML) 4 Page - STMicroelectronics |
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4 / 7 page ![]() Switching Time Resistive Load In order to saturate the power switch and reduce conduction losses, adequate direct base current IB1 has to be provided for the lowest gain hFE at 100 oC (line scan phase). On the other hand, negative base current IB2 must be provided to turn off the power transistor (retrace phase). Most of the dissipation, especially in the deflection application, occurs at switch-off. Therefore it is essential to determine the value of IB2 which minimizes power losses, fall time tf and, consequently, Tj. A new set of curves have been defined to give total power losses, ts and tf as a function of IB2 at 16 KHz frequencies for choosing the optimum negative drive. The test circuit is illustrated in fig. 1. Inductance L1 serves to control the slope of the negative base current IB2 to recombine the excess carrier in the collector when base current is still present, this avoid any tailing phenomenon in the collector current. The values of L and C are calculated from the following equations: 1 2 L (IC)2 = 1 2 C (VCEfly)2 ω= 2 πf = 1 √ L C Where IC= operating collector current, VCEfly= flyback voltage, f= frequency of oscillation during retrace. BASE DRIVE INFORMATION BUH515D 4/7 |
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