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TMF0008LP データシート(PDF) 7 Page - Texas Instruments

部品番号 TMF0008LP
部品情報  TMF0008 8K bits Serial FRAM With SDQ Interface
PDF  35 Pages
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メーカー  TI2 [Texas Instruments]
ホームページ  https://www.ti.com
Logo TI2 - Texas Instruments

TMF0008LP データシート(HTML) 7 Page - Texas Instruments

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(7)
tRC in Figure 6-19 represents the time required for the pullup circuitry to raise the voltage on the SDQ pin from VIL to the input-high
threshold of the host device. Hence, the actual maximum duration for the host to pull the line low is tRLMAX + tF.
(8)
Refers to the minimum time after which the recognition of negative edge is possible after VTH has been reached on the preceding
rising edge.
(9)
Data retention time is degraded as TA increases. Long-term storage at elevated temperatures is not recommended.
5.7 Functional Tests
Over operating free-air temperature range and VPUP = 3.3V and 5V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Multi-target bus
Any TMF0008 must be able to communicate in a network where
there are multiple responder devices. An example configuration
of 3 responder devices (including the DUT) is shown in Multiple
Responder Configurations. (1)
0
Multi-
responder
Bus Fails
(1)
See Test Procedures for Functional Tests.
5.8 Typical Characteristics
Te mperature(°C)
-10
0
10
20
30
40
50
60
70
80
1E-6
2E-6
3E-6
4E-6
5E-6
6E-6
7E-6
VPUP = 3.3V
VPUP = 5V
Figure 5-1. Input Load Current (IL) vs Temperature
(Standard Speed)
Te mperature (°C)
-10
0
10
20
30
40
50
60
70
80
1E-6
2E-6
3E-6
4E-6
5E-6
6E-6
7E-6
VPUP = 5V
Figure 5-2. Input Load Current (IL) vs Temperature
(Overdrive Speed)
www.ti.com
TMF0008
SLVSIV3 – JULY 2025
Copyright © 2025 Texas Instruments Incorporated
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Product Folder Links: TMF0008



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