データシートサーチシステム
  Japanese  ▼
ALLDATASHEET.JP

X  

ADS5240IPAP データシート(PDF) 5 Page - Texas Instruments

部品番号 ADS5240IPAP
部品情報  4-Channel, 12-Bit, 40MSPS Analog-to-Digital Converter with Serial LVDS Interface
PDF  32 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
メーカー  TI2 [Texas Instruments]
ホームページ  https://www.ti.com
Logo TI2 - Texas Instruments

ADS5240IPAP データシート(HTML) 5 Page - Texas Instruments

  ADS5240IPAP Datasheet HTML 1Page - Texas Instruments ADS5240IPAP Datasheet HTML 2Page - Texas Instruments ADS5240IPAP Datasheet HTML 3Page - Texas Instruments ADS5240IPAP Datasheet HTML 4Page - Texas Instruments ADS5240IPAP Datasheet HTML 5Page - Texas Instruments ADS5240IPAP Datasheet HTML 6Page - Texas Instruments ADS5240IPAP Datasheet HTML 7Page - Texas Instruments ADS5240IPAP Datasheet HTML 8Page - Texas Instruments ADS5240IPAP Datasheet HTML 9Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 5 / 32 page
background image
ADS5240
www.ti.com ...................................................................................................................................................... SBAS326E – JUNE 2004 – REVISED JANUARY 2009
ELECTRICAL CHARACTERISTICS (continued)
TMIN = –40°C and TMAX = +85°C. Typical values are at TA = +25°C, clock frequency = maximum specified, 50% clock duty
cycle, AVDD = 3.3V, LVDD = 3.3V, transformer coupled inputs, –1dBFS, ISET = 56.2kΩ, internal voltage reference, and LVDS
buffer current at 3.5mA per channel, unless otherwise noted. All values are applicable after the device has been reset.
ADS5240
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
ANALOG INPUT
Differential Input Capacitance
4.0
pF
Analog Input Common-Mode Range
VCM ± 50
mV
Differential Input Voltage Range
Internal Reference
2.03
VPP
External Reference
2.03 × (VREFT – VREFB)
VPP
Voltage Overhead Recovery Time(7)
3.0
CLK Cycles
–3dBFS, 25
Ω Series
Input Bandwidth
300
MHz
Resistances
DIGITAL DATA INPUTS
VIH High-Level Input Voltage
2.2
V
VIL Low-Level Input Voltage
0.6
V
CIN Input Capacitance
3.0
pF
DIGITAL DATA OUTPUTS
Data Format
Straight Offset Binary
Data Bit Rate
240
480
Mbps
SERIAL INTERFACE
SCLK Serial Clock Input Frequency
20
MHz
(7)
A differential ON/OFF pulse is applied to the ADC input. The differential amplitude of the pulse in its ON (high) state is twice the
full-scale range of the ADC, while the differential amplitude of the pulse in its OFF (low) state is zero. The overload recovery time of the
ADC is measured as the time required by the ADC output code to settle within 1% of full-scale, as measured from its mid-code value
when the pulse is switched from ON (high) to OFF (low).
REFERENCE SELECTION
MODE
INT/EXT
DESCRIPTION
Internal Reference; FSR = 2.03VPP
1
Default with internal pull-up.
0
Internal reference is powered down. The common-mode voltage
External Reference; FSR = 2.03 × (VREFT – VREFB)
of the external reference should be within 50mV of VCM. VCM is
derived from the internal bandgap voltage.
Copyright © 2004–2009, Texas Instruments Incorporated
Submit Documentation Feedback
5
Product Folder Link(s): ADS5240



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32


データシート ダウンロード

Go To PDF Page


リンク URL



ALLDATASHEETはお客様のビジネスに役立ちますか?  [ DONATE ] 

Alldatasheetは   |   広告   |   お問い合わせ   |   プライバシーポリシー   |   データシートへのリンク    |   リンク交換   |   メーカーリスト
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com