TS4994 datasheet(21/35 Pages) STMICROELECTRONICS

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TS4994

Application information

21/35

Application information

4.1

Differential configuration principle

The TS4994 is a monolithic full-differential input/output power amplifier. The TS4994 also

includes a common mode feedback loop that controls the output bias value to average it at

VCC/2 for any DC common mode input voltage. This allows the device to always have a

maximum output voltage swing, and by consequence, maximize the output power.

Moreover, as the load is connected differentially, compared to a single-ended topology, the

output is four times higher for the same power supply voltage.

The advantages of a full-differential amplifier are:

●

Very high PSRR (power supply rejection ratio).

●

High common mode noise rejection.

●

Virtually zero pop without additional circuitry, giving a faster start-up time compared

with conventional single-ended input amplifiers.

●

Easier interfacing with differential output audio DAC.

●

No input coupling capacitors required due to common mode feedback loop.

●

In theory, the filtering of the internal bias by an external bypass capacitor is not

necessary. But, to reach maximum performance in all tolerance situations, it is better to

keep this option.

The main disadvantage is:

●

As the differential function is directly linked to the mismatch between external resistors,

paying particular attention to this mismatch is mandatory in order to get the best

performance from the amplifier.

4.2

Gain in typical application schematic

Typical differential applications are shown in Figure 1 and Figure 2 on page 4.

In the flat region of the frequency-response curve (no Cin effect), the differential gain is

expressed by the relation:

where Rin = Rin1 = Rin2 and Rfeed = Rfeed1 = Rfeed2.

Note:

For the rest of this section, Avdiff will be called AV to simplify the expression.

4.3

Common mode feedback loop limitations

As explained previously, the common mode feedback loop allows the output DC bias voltage

to be averaged at VCC/2 for any DC common mode bias input voltage.

However, due to VICM limitation of the input stage (see Table 3 on page 6), the common

mode feedback loop can play its role only within a defined range. This range depends upon

diff

O+

–

Diff

input+

Diff

input-

–

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feed

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