Device Setup Example

f

=

XTAL

1

20

´ 622.08=31.154MHz

(2)

Serial Interface and Control

CDCE421A

www.ti.com..................................................................................................................................................................................................... SCAS873 – APRIL 2009

The following example illustrates the process to calculate the required AT-cut crystal frequency that is needed to

generate a desired output frequency.

Assume we need to generate an output frequency of 622.08MHz. We use Table 3 to find that the desired output

frequency lies between 583.5 and 680.0MHz.

Table 3. Crystal Frequency Selection and Device Settings (Selection)

DESIRED OUTPUT

REQUIRED INPUT CRYSTAL

FREQUENCY (MHz)

FREQUENCY (MHz)

VCO

OUTPUT

PRESCALER

FEEDBACK

From

To

From

To

SELECTION

DIVIDER

SETTING

DIVIDER(1)

680.0

766.7

34.000

38.333

VCO 2

1

3

20

583.5

680.0

29.174

34.000

VCO 1

1

3

20

510.0

587.5

31.875

36.719

VCO 2

1

4

16

(1)

Feedback divider is set automatically with respect to the prescaler setting.

This frequency value means that the device must be configured in the following way:

VCO: VCO1

Output divider: 1

Prescaler setting: 3

To determine the correct crystal frequency required to achieve 622.08 MHz with these settings, we use

Equation 2, explained earlier in this data sheet.

Thus, the AT-cut frequency should be 31.154 MHz (that is, between 29.174 MHz and 34.000 MHz, as shown in

Table 3).

The CDCE421A uses a unique, TI-proprietary interface protocol that can be configured and programmed via a

single input pin to the device. The architecture enables only writing to the device from this input pin. Reading the

content of a register can be achieved by sending a read command on the input pin and monitoring the desired

output pins (LVDS or LVPECL). In cases where the output pins cannot be used to read the content, the software

that controls the interface must account for what is written to the EEPROM and when it is programmed.

Monitoring the outputs verifies the programming modes; cycling the power on the device verifies that the

EEPROM contains the proper configuration.

The CDCE421A can be configured and programmed via the SDATA input pin. For this purpose, a pulse-code

shaped programming sequence must be written to the device as described in the EEPROM Programming

section. During the EEPROM programming phase, the device requires a stable supply voltage (VDD) of 3.3 V

±300 mV for securely writing to the EEPROM cells. After each Write to WordX instruction, the written data are

latched, made effective, and offer look-ahead before the actual data are stored into the EEPROM.

Copyright © 2009, Texas Instruments Incorporated

Submit Documentation Feedback

7

Product Folder Link(s): CDCE421A