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STA333W データシート(PDF) 40 Page - STMicroelectronics |
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STA333W データシート(HTML) 40 Page - STMicroelectronics |
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40 / 50 page  Applications information STA333W 40/50 DocID13365 Rev 3 Figure 12. PLL filter circuit 7.3 Typical output configuration Figure 13 below shows a typical output configuration used for BTL stereo mode. Figure 13. Output configuration for stereo BTL mode 100pF F ILT E R _ P LL 6 80pF 4.7 n F 2K 2 100pF F ILT E R _ P LL 6 80pF 4.7 n F 2K 2 BE A D P L L_G N D G ND_ DIG 100pF F ILT E R _ P LL 6 80pF 4.7 n F 2K 2 100pF F ILT E R _ P LL 6 80pF 4.7 n F 2K 2 BE A D BE A D P L L_G N D G ND_ DIG 22uH 22uH 100nF 100nF 470nF 330pF 100nF 22 LEFT 100nF 6.2 OUT1A OUT1B 6.2 22uH 22uH 100nF 100nF 470nF 330pF 100nF 22 RIGHT 100nF 6.2 OUT2A OUT2B 6.2 22uH 22uH 100nF 100nF 470nF 330pF 100nF 22 LEFT 100nF 6.2 OUT1A OUT1B 6.2 22uH 22uH 100nF 100nF 470nF 330pF 100nF 22 LEFT 100nF 6.2 OUT1A OUT1B 6.2 22uH 22uH 100nF 100nF 470nF 330pF 100nF 22 RIGHT 100nF 6.2 OUT2A OUT2B 6.2 22uH 22uH 100nF 100nF 470nF 330pF 100nF 22 RIGHT 100nF 6.2 OUT2A OUT2B 6.2 |
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