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ISO7720DR.B データシート(PDF) 35 Page - Texas Instruments |
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ISO7720DR.B データシート(HTML) 35 Page - Texas Instruments |
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35 / 51 page  www.ti.com EXAMPLE BOARD LAYOUT .0028 MAX [0.07] ALL AROUND .0028 MIN [0.07] ALL AROUND (.213) [5.4] 6X (.050 ) [1.27] (.217) [5.5] 8X (.061 ) [1.55] 8X (.024) [0.6] (R.002 ) TYP [0.05] 8X (.055) [1.4] 8X (.024) [0.6] 6X (.050 ) [1.27] (R.002 ) [0.05] TYP SOIC - 1.75 mm max height D0008B SMALL OUTLINE INTEGRATED CIRCUIT 4221445/C 02/2019 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. METAL SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS EXPOSDE METAL OPENING SOLDER MASK METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL EXPOSED METAL SHOWN LAND PATTERN EXAMPLE SCALE:6X SYMM 1 4 5 8 SEE DETAILS IPC-7351 NOMINAL .150 [3.85] CLEARANCE / CREEPAGE SYMM HV / ISOLATION OPTION .162 [4.1] CLEARANCE / CREEPAGE SYMM 1 4 5 8 SEE DETAILS SYMM www.ti.com ISO7720, ISO7721 SLLSEP3G – NOVEMBER 2016 – REVISED MAY 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 35 Product Folder Links: ISO7720 ISO7721 |
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