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OPA830 データシート(PDF) 12 Page - Texas Instruments

部品番号 OPA830
部品情報  OPAx835 Ultra-Low-Power, Rail-to-Rail Out, Negative Rail In, VFB Op Amp
PDF  63 Pages
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メーカー  TI2 [Texas Instruments]
ホームページ  https://www.ti.com
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OPA830 データシート(HTML) 12 Page - Texas Instruments

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7.7 Electrical Characteristics: VS = 5 V (continued)
at VS+ = +5 V, VS– = 0 V, VOUT = 2 VPP, RF = 0 Ω, RL = 2 kΩ, G = 1 V/V, input and output referenced to mid-supply. TA =
25°C, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
TEST
LEVEL(1)
Power supply rejection (±PSRR)
90
110
dB
A
POWER DOWN (PIN MUST BE DRIVEN)
Enable voltage threshold
Specified "on" above VS–+ 2.1 V
1.4
2.1
V
A
Disable voltage threshold
Specified "off" below VS–+ 0.7 V
0.7
1.4
V
A
Power-down pin bias current
PD = 0.5 V
20
500
nA
A
Power-down quiescent current
PD = 0.5 V
0.5
1.5
µA
A
Turnon time delay
Time from PD = high to VOUT = 90% of final value
200
ns
C
Turnoff time delay
Time from PD = low to VOUT = 10% of original value
60
ns
C
(1)
Test levels (all values set by characterization and simulation): (A) 100% tested at 25°C; over temperature limits by characterization and
simulation. (B) Not tested in production; limits set by characterization and simulation. (C) Typical value only for information.
(2)
Current is considered positive out of the pin.
(3)
Input Offset Voltage Drift, Input Bias Current Drift, and Input Offset Current Drift are average values calculated by taking data at the
end points, computing the difference, and dividing by the temperature range.
OPA835, OPA2835
SLOS713J – JANUARY 2011 – REVISED MARCH 2021
www.ti.com
12
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Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: OPA835 OPA2835



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