C

C

C

VREF

VIN

REF

DIG1

Microcontroller

A/D Input

Via

to GND

Plane

Via to

Input Power

Analog Input

VBIAS

GND

EN

REF

V+

GND

OUT

IN-

IN+

AIN

C

C

23

REF1925, REF1930, REF1933, REF1941

www.ti.com

SBOS697A – SEPTEMBER 2014 – REVISED JANUARY 2017

Product Folder Links: REF1925 REF1930 REF1933 REF1941

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Copyright © 2014–2017, Texas Instruments Incorporated

12 Layout

12.1 Layout Guidelines

Figure 54 shows an example of a PCB layout for a data acquisition system using the REF1930. Some key

considerations are:

•

Connect low-ESR, 0.1-μF ceramic bypass capacitors at VIN, VREF, and VBIAS of the REF1930.

•

Decouple other active devices in the system per the device specifications.

•

Using a solid ground plane helps distribute heat and reduces electromagnetic interference (EMI) noise pickup.

•

Place the external components as close to the device as possible. This configuration prevents parasitic errors

(such as the Seebeck effect) from occurring.

•

Minimize trace length between the reference and bias connections to the INA and ADC to reduce noise

pickup.

•

Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if

possible and only make perpendicular crossings when absolutely necessary.

12.2 Layout Example

Figure 54. Layout Example