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TMUX7308FPWR データシート(PDF) 30 Page - Texas Instruments

部品番号 TMUX7308FPWR
部品情報  TMUX730xF ±60-V Fault-Protected, 8:1 and Dual 4:1 Multiplexers with Latch-Up Immunity and 1.8-V Logic
PDF  54 Pages
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メーカー  TI2 [Texas Instruments]
ホームページ  https://www.ti.com
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TMUX7308FPWR データシート(HTML) 30 Page - Texas Instruments

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8.8 Fault Response Time
Fault response time (tREPONSE) measures the delay between the source voltage exceeding the supply voltage
(VDD or VSS) by 0.5 V and the drain voltage failing to 50% of the maximum output voltage. Figure 8-9 shows the
setup used to measure tRESPONSE.
VS
0 V
tRESPONSE (VDD)
Output
VDD + 0.5 V
SW
Sx
D/ DX
SW
GND
GND
RL
VS
GND
CL
GND
SW
All other
source
pins
0 V
Output
Output × 50%
VDD
VS
0 V
tRESPONSE (VSS)
Output
VSS - 0.5 V
0 V
Output × 50%
VSS
tRESPONSE = max ( tRESPONSE(VDD), tRESPONSE(VSS))
VDD
VSS
VDD
VSS
GND
0.1 µF
GND
0.1 µF
Max positive fault
Max negative fault
60V/µs
ramp
60V/µs
ramp
Figure 8-9. Fault Response Time Measurement Setup
8.9 Fault Recovery Time
Fault recovery time (tRECOVERY) measures the delay between the source voltage falling from overvoltage
condition to below supply voltage (VDD or VSS) plus 0.5 V and the drain voltage rising from 0 V to 50% of
the final output voltage. Figure 8-10 shows the setup used to measure tRECOVERY.
VS
tRECOVERY (VDD)
Output
VDD + 0.5 V
SW
Sx
D/ DX
SW
GND
GND
RL
VS
GND
CL
GND
SW
All other
source
pins
0 V
Output
Output × 50%
Output
0 V
tRECOVERY = max ( tRECOVERY(VDD), tRECOVERY(VSS))
0 V
VSS - 0.5 V
0 V
Output x 50%
tRECOVERY (VSS)
VS
VDD
VSS
VDD
VSS
GND
0.1 µF
GND
0.1 µF
Figure 8-10. Fault Recovery Time Measurement Setup
TMUX7308F, TMUX7309F
SCDS403C – FEBRUARY 2021 – REVISED JULY 2023
www.ti.com
30
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Copyright © 2023 Texas Instruments Incorporated
Product Folder Links: TMUX7308F TMUX7309F



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