 |
データシートサーチシステム |
|
|
データシートサーチシステム |
|
TPA3136AD2PWPR データシート(PDF) 12 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
TPA3136AD2PWPR データシート(HTML) 12 Page - Texas Instruments |
|
|
12 / 38 page  PVCC PVCC GVDD PVCC PVCC BSPL GND OUTPL OUTNL GND GVDD BSNL Gate Drive PVCC PVCC GVDD PVCC PVCC BSNR GND OUTNR OUTPR GND GVDD BSPR LINP LINN RINP RINN FAULT SD AVCC AVDD GVDD GVDD PLIMIT PBTL Select PBTL Select OUTPL FB OUTNL FB OUTNR FB OUTNR FB OUTPR FB OUTNR FB OUTNL FB OUTPL FB PLIMIT PLIMIT PBTL Control PBTL Thermal Detect DC Detect SD Detect UVLO/ OVLO Startup Protection Logic Biases and References Ramp Generator Spread Spectrum Control PWM Logic LDO Regulator Gate Drive Gate Drive Gate Drive TTL Buffer LIMITER Reference + ± + ± PWM Logic ± + ± + + ± 12 TPA3136D2, TPA3136AD2 SLOS938F – MAY 2016 – REVISED JANUARY 2020 www.ti.com Product Folder Links: TPA3136D2 TPA3136AD2 Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated 9.2 Functional Block Diagram |
|
リンク URL |
| ALLDATASHEETはお客様のビジネスに役立ちますか？ [ DONATE ] |
Alldatasheetは | 広告 | お問い合わせ | プライバシーポリシー | データシートへのリンク | リンク交換 | メーカーリスト All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Japanese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
