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HCF4536B データシート(PDF) 12 Page - STMicroelectronics |
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HCF4536B データシート(HTML) 12 Page - STMicroelectronics |
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12 / 17 page ![]() Functional Test Sequence Inputs Outputs Comments I n1 Set Reset 8-Bypass Decade Out Q 1 Thru Q 2 4 All 2 4 steps a r e in reset mode. 101 1 0 111 1 0 Counter is in three 8-stage section in parallel mode. 0 1 1 1 0 First ”1” to ”0” Transition of Clock 1 0 – – 11 1 255 ”1” to ”0” transitions are clocked in the counter. 0 1 1 1 1 The 255 ”1” to ”0” Transition 000 0 1 Counter converted back to 24 stages in series mode. Set and Reset must be connected together and simultaneoulsy go from ”1” to ”0”. 100 0 1 In 1 switches to a ”1”. 0 0 0 0 0 Counter Ripples from an all ”1” state to an all ”0” state. Input Voltage. Quiescent Device Current. TEST CIRCUITS FUNCTIONAL TEST SEQUENCE Test Function has been included for the reduction of test time required to exercise all 24 counter stages. This test function divides the counter into three 8- stage section and 255 counts are loaded in each of the 8-stage sections in parallel. All flip-flops are now at a ”1”. The counter is now returned to the normal 24-steps in series configuration. One more pulse is entered into In1 which will cause the counter to ripple from an all ”1” state to an all ”0” state. HCC/HCF4536B 12/17 |
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