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SSM2602CPZ-R2 データシート(PDF) 25 Page - Analog Devices

部品番号 SSM2602CPZ-R2
部品情報  Low Power Audio Codec
PDF  32 Pages
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メーカー  AD [Analog Devices]
ホームページ  http://www.analog.com
Logo AD - Analog Devices

SSM2602CPZ-R2 データシート(HTML) 25 Page - Analog Devices

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SSM2602
Rev. 0 | Page 25 of 32
POWER MANAGEMENT, ADDRESS 0x06
Table 24. Power Management Register Bit Map
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
PWROFF
CLKOUT
OSC
OUT
DAC
ADC
MIC
LINEIN
Table 25. Description of Power Management Register Bits
Bit Name
Description
Settings
PWROFF
Whole chip power-down control
0 = power up
1 = power down (default)
CLKOUT
Clock output power-down control
0 = power up (default)
1 = power down
OSC
Crystal power-down control
0 = power up (default)
1 = power down
OUT
Output power-down control
0 = power up
1 = power down (default)
DAC
DAC power-down control
0 = power up
1 = power down (default)
ADC
ADC power-down control
0 = power up
1 = power down (default)
MIC
Microphone input power-down control
0 = power up
1 = power down (default)
LINEIN
Line input power-down control
0 = power up
1 = power down (default)
Power Consumption
Table 26.
Mode
PWROFF
CLKOUT
OSC
OUT
DAC
ADC
MIC
LINEIN
AVDD
(3.3V)
HPVDD
(3.3 V)
DCVDD
(3.3 V)
DBVDD
(3.3 V)
Unit
Record and Playback
0
0
0
0
0
0
0
0
10.7
2.2
3.6
3.1
mA
Playback Only
Oscillator Enabled
0
0
0
0
0
1
1
1
5.2
2.2
1.7
1.8
mA
External Clock
0
1
1
0
0
1
1
1
5.1
2.2
1.7
1.7
mA
Record Only
Line Clock
0
0
0
1
1
0
1
0
4.7
N/A
2.0
1.9
mA
Line Oscillator
0
0
1
1
1
0
1
0
4.7
N/A
2.0
1.8
mA
Microphone 1
0
0
0
1
1
0
0
1
4.8
N/A
2.0
1.9
mA
Microphone 2
0
0
1
1
1
0
0
1
4.8
N/A
2.0
1.8
mA
Sidetone
(Microphone-to-
Headphone
Output)
External Clock
0
0
1
0
1
1
0
1
2.0
2.2
0.2
1.7
mA
Internally
Generated Clock
0
0
1
0
1
1
0
1
2.0
2.2
0.2
1.7
mA
Analog Bypass
(Line Input or
Line Output)
External Line
0
0
1
0
1
1
1
0
2.0
2.2
0.2
1.7
mA
Internally
Generated Line
0
0
1
0
1
1
1
0
2.0
2.2
0.2
1.7
mA
Power-Down
External Clock
1
1
1
1
1
1
1
1
0.001
<1uA
0.03
0.03
mA
Oscillator
1
1
1
1
1
1
1
1
0.001
<1uA
0.03
0.03
mA



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