DS90C031B

LVDS Quad CMOS Differential Line Driver

General Description

The DS90C031B is a quad CMOS differential line driver

designed for applications requiring ultra low power dissipa-

tion and high data rates. The device is designed to support

data rates in excess of 155.5 Mbps (77.7 MHz) utilizing Low

Voltage Differential Signaling (LVDS) technology.

The DS90C031B accepts TTL/CMOS input levels and trans-

lates them to low voltage (350 mV) differential output sig-

nals. In addition the driver supports a TRI-STATE function

that may be used to disable the output stage, disabling the

load current, and thus dropping the device to an ultra low idle

power state of 11 mW typical.

In addition, the DS90C031B provides power-off high imped-

ance LVDS outputs. This feature assures minimal loading

effect on the LVDS bus lines when V

The DS90C031B and companion line receiver (DS90C032B)

provide a new alternative to high power pseudo-ECL devices

for high speed point-to-point interface applications.

Features

155.5 Mbps (77.7 MHz) switching rates

n

High impedance LVDS outputs with power-off

350 mV differential signaling

n

Ultra low power dissipation

n

400 ps maximum differential skew (5V, 25˚C)

n

3.5 ns maximum propagation delay

n

Industrial operating temperature range

n

Pin compatible with DS26C31, MB571 (PECL) and

41LG (PECL)

n

Conforms to ANSI/TIA/EIA-644 LVDS standard

n

Offered in narrow body SOIC package

n

Fail-safe logic for floating inputs

Connection Diagram

Dual-In-Line

10098901

Order Number DS90C031BTM

See NS Package Number M16A

Functional Diagram

10098902

Driver Truth Table

Enables

Input

Outputs

EN

EN*

D

IN

D

OUT+

D

OUT−

LH

X

Z

Z

All other combinations

L

L

H

of ENABLE inputs

H

H

L

October 2001

© 2001 National Semiconductor Corporation

DS100989

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