L6997 datasheet(18/23 Pages) STMICROELECTRONICS

18 / 23 page

L6997

18/23

Eq 24

α is the temperature coefficient of RDSON (typically, α = 510-3 °C-1 for these low-voltage classes) and T the

admitted temperature rise. It is worth noticing, however, that generally the lower RDSON, the higher is the gate

charge QG, which leads to a higher gate drive consumption. In fact, each switching cycle, a charge QG moves

from the input source to ground, resulting in an equivalent drive current:

Eq 25

The SCHOTTKY diode to be placed in parallel to the synchronous rectifier must have a reverse voltage VRRM

greater than VINMAX; for low current application the SCHOTTKY is not necessary to increase the efficiency. In

order to use less space than possible, a double MOSFET in a single package is chosen: STS5DNF20V

3.5 Output voltage setting

The first step is choosing the output divider to set the output voltage. To select this value there isn't a criteria,

but a low divider network value (around 100

Ω) decries the efficiency at low current; instead a high value divider

network (100K

Ω) increase the noise effects. A network divider values from 1KΩ to 10KΩ is right. We chose:

R3 = 1K

Ω

R2 = 1.1K

Ω

The device output voltage is adjustable by connecting a voltage divider from output to VSENSE pin. Minimum

output voltage is VOUT=VREF=0.6V. Once output divider and frequency divider have been designed as to obtain

the required output voltage and switching frequency, the following equation gives the smallest input voltage,

which allows L6997 to regulate (which corresponds to TOFF=TOFFMIN):

Eq 26

3.6 Voltage Feedforward

From the equations 1,2 3 choosing the switching frequency around 270kHz it can be selected the input divider.

For example:

R3 = 470K

Ω

R4 = 8.5K

Ω

3.7 Current limit resistor

From the equation 8 it can be set the valley current limit considering the STS5DNF20V Ultra logic Level Mosfet

with a current around 5A:

R8 = 120K

Ω

3.8 Integrator capacitor

Let it be FU = 15kHz, VOUT = 1.25V.

Since VREF = 0.6V, from equation 2, of the device description, it follows

αOUT = 0.348 and, from equation 5 it

follows C = 250pF. The output ripple is around 22mV, so the system doesn't need the second integrator capac-

itor.

RDS

Io ut

∆

⋅

()

⋅

-------------------------------------------------

Qg F

⋅

δ 1

OS C

OUT

---------------

OSC

OF F,M IN

--------------------------







MAX

----------------------------------------------

⋅

–

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