L9230

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SPI-INTERFACE

General Discription

The serial SPI interface establishes a communication link between L9230 and the systems microcontroller.

L9230 always operates in slave mode whereas the controller provides the master function.

The maximum baud rate is 2 MBaud (200pF).

Applying an active slave select signal at SS L9230 is selected by the SPI master. SI is the data input (Slave In),

SO the data output (Slave Out). Via SCK (Serial Clock Input) the SPI clock is provided by the master.

In case of inactive slave select signal (High) the data output SO goes into tristate.

Figure 8.

Depending on the application the first two bits of an instruction may be used to estabish an extended

device-addressing. This gives the opportunity to operate up to 4 Slave-devices sharing one common SS signal

from the Master-Unit

Power Supply of the SPI-Interface

SPI-Logic and I/O-Pins are alternativ supplied from DMS or Vcc internal, depending on which voltage is higher.

That is why diagnosis of the EN-/DI-Pins is always possible, even in case of missing H-Bridge-power supply e.g.

during „Vorlauf/Nauchlauf“.

SPI Control:

SI

SS

State Machine

Shift Register

Clock Counter

Control Bits

Parity Generator

DMS

SPI Power Supply

DIA_REG