Bus Timing (figure 4)

µs before

CSN goes low. It is allowed to change the level of

R/WN during CSN = 0. The other signals could be

changed. To store a command it is mandatory to

µs before

the positive edge of CSN.

OVERCURRENT AT OUT1 - OUT5:

The output currents of OUT1 - OUT5 are inter-

nally limited. This is realized in the following way:

When the output current reaches a certain level

(see pag...) the Gate - Source voltage will be

clamped to a lower level. The output current is

now limited and follows the output ID, UDS char-

acteristic for this Gate - Source voltage. An inter-

nal timer starts when the output voltage drop

After 100

µs typ. the output is switched OFF and

the corresponding overcurrent bit (OVC1 or

OVC2) will be set. The outputs can be activated

again with the next input data word.

Symbol

Parameter

Min.

Typ.

Max.

Unit

Width of CSN Low

20

90*

µs

Width of CSN High

10

µs

Input Signals Before Negative Cdge of CSN

1

µs

Input Signals After Positive Edge of CSN

1

µs

Valid Diagnostic Data

10

µs

Valid Diagnostic Data

10

µs

Delay Time from Input to Power Output, VS = 13V

300

µs

CSN = Low Duration (Pulse Length) for CLEAR of latched Data

100

µs

Input Data Before Positive Edge of CSN Which Should be Latched

1

µs

µs the latched data will be reseted due to CLEAR (status 20)

TIMING CHARACTERISTICS

Figure 4: Bus and Outputs Timing Diagram

L9947

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