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TDA7350A データシート(PDF) 13 Page - STMicroelectronics |
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TDA7350A データシート(HTML) 13 Page - STMicroelectronics |
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13 / 23 page ![]() 13/23 TDA7350A of low leakage diodes, too. It guarantees BVCEO > 20V and BVCBO > 50V both for NPN and PNP transis- tors. Basically, the connection shown in fig. 34 has been chosen. First of all because its voltage swing is rail-to-rail, limited only by the VCEsat of the output transistors, which are in the range of 0.3 Ω each. Then, the gain VOUT/VIN is greater than unity, approximately 1+R2/R1. (VCC/2 is fixed by an auxiliary amplifier common to both channel). It is possible, controlling the amount of this local feedback, to force the loop gain (A . β) to less than unity at frequencies for which the phase shift is 180°. This means that the output buffer is intrinsically stable and not prone to oscillation. Figure 34. The New Output Stage In contrast, with the circuit of fig. 35, the solution adopted to reduce the gain at high frequencies is the use of an external RC network. 4.8 AMPLIFIER BLOCK DIAGRAM The block diagram of each voltage amplifier is shown in fig. 36. Regardless of production spread, the cur- rent in each final stage is kept low, with enough margin on the minimum, below which cross-over distortion would appear. Figure 35. A Classical Output Stage Figure 36. Amplifier Block Diagram |
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