AT25DF021A-DWFHT datasheet(16/59 Pages) RENESAS

16 / 59 page

DS-AT25DF021A-042 Rev. L

Page 16

8/7/23

AT25DF021A Datasheet

Program and Erase Commands

8.1

Byte/Page Program

The Byte/Page Program command allows anywhere from a single byte of data to 256 bytes of data to be

programmed into previously erased memory locations. An erased memory location is one that has all eight bits set

to the logical 1 state (a byte value of FFh). Before a Byte/Page Program command can be started, the Write

Enable command must have been previously issued to the device (see “Write Enable” on page 23) to set the Write

Enable Latch (WEL) bit of the Status Register to a logical 1 state.

To perform a Byte/Page Program command, an opcode of 02h must be clocked into the device followed by the

three address bytes denoting the first byte location of the memory array to begin programming at. After the

address bytes have been clocked in, data can then be clocked into the device and are stored in an internal buffer.

If the starting memory address denoted by A23-A0 does not fall on an even 256-byte page boundary (A7-A0 are

not all 0), then special circumstances regarding which memory locations to be programmed apply. In this situation,

any data that is sent to the device that goes beyond the end of the page wraps around back to the beginning of the

same page. For example, if the starting address denoted by A23-A0 is 0000FEh, and three bytes of data are sent

to the device, then the first two bytes of data are programmed at addresses 0000FEh and 0000FFh while the last

byte of data is programmed at address 000000h. The remaining bytes in the page (addresses 000001h through

0000FDh) are not programmed and remain in the erased state (FFh). Also, if more than 256 bytes of data are sent

to the device, then only the last 256 bytes sent are latched into the internal buffer.

When the CS pin is deasserted, the device takes the data stored in the internal buffer and program it into the

appropriate memory array locations based on the starting address specified by A23-A0 and the number of data

bytes sent to the device. If less than 256 bytes of data were sent to the device, then the remaining bytes within the

page are not programmed and remain in the erased state (FFh). The programming of the data bytes is internally

self-timed and takes place in a time of tPP or tBP if only programming a single byte.

The three address bytes and at least one complete byte of data must be clocked into the device before the CS pin

is deasserted, and the CS pin must be deasserted on even byte boundaries (multiples of eight bits); otherwise, the

device stops the operation and no data are programmed into the memory array. Also, if the memory is in the

protected state (see “Protect Sector” on page 24), then the Byte/Page Program command is not executed, and the

device returns to the idle state once the CS pin has been deasserted. The WEL bit in the Status Register is reset

back to the logical 0 state if the program cycle stops due to an incomplete address being sent, an incomplete byte

of data being sent, the CS pin being deasserted on uneven byte boundaries, or because the memory location to

be programmed is protected.

While the device is programming, the Status Register can be read and indicates that the device is busy. For faster

throughput, it is recommended that the Status Register be polled rather than waiting the tBP or tPP time to

determine if the data bytes have finished programming. For fastest throughput and least power consumption, it is

recommended that the Active Status Interrupt command 25h be used. After the initial 16 clocks, no more clocks

are required. Once the BUSY cycle is done, SO is driven low immediately to signal the device has finished

programming.At some point before the program cycle completes, the WEL bit in the Status Register is reset back

to the logical 0 state.

The device also incorporates an intelligent programming algorithm that can detect when a byte location fails to

program properly. If a programming error arises, it is indicated by the EPE bit in the Status Register.

AT25DF021A-DWFHT データシート(PDF) 16 Page - Renesas Technology Corp

AT25DF021A-DWFHT データシート(HTML) 16 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59

データシートダウンロード