TS4855 datasheet(22/27 Pages) STMICROELECTRONICS

22 / 27 page

TS4855

Application Information

22/27

6.6 Pop and Click performance

The TS4855 has internal Pop and Click reduction

circuitry. The performance of this circuitry is

closely linked with the value of the input capacitor

Cin and the bias voltage bypass capacitor Cb.

The value of Cin is due to the lower cut-off

frequency value requested. The value of Cb is

due to THD+N and PSRR requested always in

lower frequency.

The TS4855 is optimized to have a low pop and

click in the typical schematic configuration (see

page 2).

Note: The value of Cs is not an important

consideration as regards pop and click.

6.7 Notes on PSRR measurement

What is the PSRR?

The PSRR is the Power Supply Rejection Ratio.

The PSRR of a device, is the ratio between a

power supply disturbance and the result on the

output. We can say that the PSRR is the ability of

a device to minimize the impact of power supply

disturbances to the output.

How we measure the PSRR?

The PSSR was measured according to the

schematic shown in Figure 57.

Figure 57: PSRR measurement schematic

Principles of operation

•

The DC voltage supply (Vcc) is fixed.

•

The AC sinusoidal ripple voltage (Vripple) is

fixed.

•

No bypass capacitor Cs is used.

The PSRR value for each frequency is:

Note: The measure of the Rms voltage is a Rms

selective measure with a bandpass equal to 1%

of the measured frequency .

6.8 Power-On Reset

When Power is applied to Vdd, an internal Power

On Reset holds the TS4855 in a reset state until

the Supply Voltage reached its nominal value.

The Power On reset has a typical threshold at

1.8V.

)

(

RMS

Log

PSRR

)

Vripple

(

)

Output

(













TS4855 データシート(PDF) 22 Page - STMicroelectronics

TS4855 データシート(HTML) 22 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27

データシートダウンロード