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M491B データシート(PDF) 5 Page - STMicroelectronics

部品番号 M491B
部品情報  SINGLE-CHIP VOLTAGE SYNTHESIS TUNING SYSTEM WITH 1 ANALOG CONTROL
PDF  16 Pages
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メーカー  STMICROELECTRONICS [STMicroelectronics]
ホームページ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M491B データシート(HTML) 5 Page - STMicroelectronics

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40
12
5
I (mA)
Typ. max. 20msec
Typ. max. 8msec
t (ms)
Figure 2
ERASE CYCLE
Figure 3 shows the timing and the waveform of the
current flowing through Pin 2 during the erase
operation. The peak current is 7mA (max) during
the erase cycle and 6mA (max) during the read
cycle. The typical erase time is 10ms for a new
device and increases with the number of modify
operations up to 200ms after 1000 cycles.
In order to protect the memory in case of failure of
some bits the modify operation is stopped after
1sec.
READ CYCLE
Figure 4 shows the waveform of the current during
a read operation.
32 44
256
µs
6mA
7mA
128
µs
52
Figure 3
64
32 44
116
µs
256
µs
40mA
6mA
12mA
After about 30msec
Figure 1
44
6mA
128
µs
84
µs
480
µs
Figure 4
M491B
5/16



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